Table of Contents

Scope

This Application Note provides an introduction to The AUTOSAR Memory stack and the modules used to implement it. It also describes the types of memory used to support the implementation, and how they are used.

Definitions

NvM types

There are two types of Non-volatile memory in an AUTOSAR system:

EEPROM   

Page size = Sector size. Page size typically 4 or 8 bytes. The number of Erase write cycles for EEPROM is greater than 10 times that of  Data flash. This is because of a more complex memory cell structure and results in a lower capacity to data flash.

Data flash

Page size < sector size. Page size typically 4 or 8 bytes, sector size is device dependent, example size 16 k Bytes. Data flash has a simpler memory cell structure, resulting in a greater capacity, but lower erase write cycle endurance.

Memory Stack Modules

NVRAM Manager (NVM)

The NVRAM Manager manages the NvM data of an EEPROM and/ or Data Flash EEPROM Emulation. NVRAM Manager manages all data requests to the EEPROM/Flash.

Memory Abstraction Interface (MemIf)

The Memory Abstraction Interface provides the abstraction from the underlying FEE and EA modules. The MemIf module is a routing layer to the functions of the EA and the Fee. For each NvM block, a device index is configured, and this index is used by MemIf to determine if Fee or EA is accessed. Thus, the MemIf is independent of the driver interface layers of EEPROM (Eep) and Flash interface (Fls).

EEPROM Abstraction (EA)

The EEPROM abstraction layer manages data organisation. The EA module facilitates abstraction from the addressing scheme of underlying EEPROM driver and provides a uniform addressing scheme. This means that the upper layer (NvM) need not be changed if the underlying EEPROM driver and device is replaced.

Flash EEPROM Emulation (FEE)

The FEE Module abstracts from the device, a specific addressing scheme and segmentation. This provides the upper layer, NvM Manager, with a virtual addressing scheme, segmentation and virtually unlimited number of erase write cycles.

Flash Driver (Fls)

Fls Driver Initializes Flash, reads / writes to flash memory.

EEPROM driver (EEP)

The Eep provides device driver forboth internal and external EEPROMs,  it provides services for reading, writing, and erasing data to/from an EEPROM. The EEP also provides a service for comparing a data block in EEPROM with a data block in RAM.

NvM block overview

• One or several NvM blocks (physical storage in non-volatile memory – EEPROM or Flash)
• One optional RAM Block, belonging to the application, that will be synchronised (either on demand or on power down) with the NvM block, minimising the writing to NvM.
• One optional ROM block, belonging to the application, contains the default contents (data that will be restored to the block in case of problems during the initialization)
• Data integrity ensured by CRC (16 or 32 bit)
• Blocks can be:
  • Single (no redundancy)
  • Redundant (block duplicated)
  • Dataset (n different values of the same block, with no redundancy)
• Prioritisation scheme: Prioritisation can be applied to each block
• Protection scheme: some blocks can be Write-protected or Write-once
• Immediate APIs protect important data

NvM interaction with RAM

• Synchronise on power transitions:
  • Power up: all data moved from NvM to RAM (NVM_ReadAll)
  • Power down: all flagged data moved from RAM to NvM (NVM_WriteAll)
  • The application works with RAM data to flag it as valid (to be written to NvM) or invalid (not to be written to NvM).
• On-demand block writes:
  • Data is written to NvM on API request (NvM_WriteBlock)

Fee versions

The different file system versions are listed below and are specific to RTA-CAR. Different versions are incompatible.

Fs1

Round Robin, header, and user data are stored next to each other. No longer supported. Fs1 is replaced by Fs1x.

Fs1x

Fs1 compatible. Re-write of Fs1 to be ASPICE compliant.

Fs2

Separate sectors for header and user data.

Fs3

PCM (Phase Change Memory) Memory Management. Memory is split in 2 to provide redundant storage.

File system type is selected by parameter FeeRbFsSelect. Other configuration parameters are unchanged.

Erasing flash memory

Flash memory has a maximum number of erase/write cycles. Exceeding this maximum can result in damage to the memory cell, with subsequent data loss. The number of erase/write cycles is typically 125,000 - 250,000. Applications should avoid unnecessary writes.

Some processors generate an exception (e.g. RH850 family) if over-programming occurs (too many erase/write cycles). In these processors, the programming sequence is:

• check memory contents does not already equal the data to be written.
• If it is not equal, program the data into flash.
• verify that tha data has been correctly written.

MemStack APIs

List of available NvM APIs